Design of fault detection and tolerance system in analog and digital CMOScircuits

Accurate calculation of error in terms of existing parameters in circuit including voltage, gain, and the total energy consumption in analog and digital CMOS circuits require simulation of circuit with precise parameters under real conditions with real inputs. This is fulfilled in analog-like simulation software. In such simulations, Spice simulation time increases and reaches to several days by increasing number of elements in the circuit. In mostcases, due to needing to high accuracy, an attempt is made to use analog simulation and estimate energy with faster methods and lower accuracy such as digital simulation. The present research intends to make the calculations and estimate power based on number oftransitions. Obtained results indicate calculations and estimation of error at high accuracy. Keywords: fault detection, tolerance system, CMOS circuits