A New FLC Using New Fuzzifier and Max Circuits

The design and simulation of a digital fuzzy logic controller applicable for nonlinear systems based on a new strategy in which analog advantages such as low die area, high speed, and simplicity are added to the total digital system advantages, with unchanged digital system properties, is considered in this paper. For implementing this idea, a new programmable fuzzifier circuit has been designed for a five-bit digital input signal and membership degree as an analog current with five-bit resolution in the range of 58uA. It has also been presented a new high-accurate simple current-mode circuit for Max block. The controller circuit was implemented in an area less than 0.11mm2 in 0.35um, CMOS technology. A controller of two inputs, nine rules, and one output simulated with MATLAB systematically, and the total controller circuit simulated with HSPICE and the Layouts were extracted with Magic. The inference speed of the controller is about 8.85 MFLIPS.