Designing novel LDO voltage regulator implementation on FPGA using neural network
سال انتشار: 1400
نوع سند: مقاله ژورنالی
زبان: انگلیسی
مشاهده: 141
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شناسه ملی سند علمی:
JR_APRIE-8-3_002
تاریخ نمایه سازی: 2 دی 1400
چکیده مقاله:
This paper describes a new technique for implementing an Artificial Neural Network (ANN) using Field Programmable Gate Array (FPGA). The goal is design the Low Drop Output (LDO) voltage-regulator circuit with the desired features depending on the application. (The first novelty is designing an LDO with variable features). Voltage regulators bring voltage changes to a stable and acceptable level, especially for products using portable devices. The fragmentary neural network algorithm is modeled using the Xilinx generator system and it can be implemented in Xilinx FPGA (the second novelty is implanting fragmentary ANN in FPGA for parallel computations and real time design). The neural network is trained using the levenberg-Marquardt algorithm which is the data collected from HSPICE software. In Matlab, the tangent-sigmoid function is used as a neuron activation function, but the block set provided by the Xilinx generator system does not have a tangent-sigmoid operator, so the tan-sigmoid operator is modeled on the Maclaurin expansion (the third novelty is using Maclaurin series for approximation function along with the reduction of connections in the neural network to reduce many blocks in FPGA). In this paper, the similarity of the tangent-sigmoid function produced using Matlab and the approximation of the performance of this function using the Maclaurin series are shown. When the inputs are between -۰.۵ to +۰.۵, the simulated results show that the absolute error between the values of tan-sigmoid function based on Matlab and Xilinx System Generator using Maclaurin power series are not more than ۰.۱۷%. The performance modeling of the system generator with ۰.۹۹۶۵۱۵% accuracy of Matlab modeling.
کلیدواژه ها:
Neural Network ، System Generator ، LDO Voltage Regulator ، Field Programmable Gate Array ، Multilayer Perceptron
نویسندگان
Mahdieh Jahangiri
Department of Electrical Engineering, South Tehran Branch, Islamic Azad University, Tehran, Iran.
Ali Farrokhi
Department of Electrical Engineering, South Tehran Branch, Islamic Azad University, Tehran, Iran.
Amir Amirabadi
Department of Electrical Engineering, South Tehran Branch, Islamic Azad University, Tehran, Iran.
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