H.264/AVC Video Encoder Implementation on TMS320C6678 DSP

H.264/AVC is one of the state-of-the-art coding standards finalized by Joint Video Team (JVT) that has better coding efficiency and performance but at the cost of higher computational complexity. In this paper, we introduce methods to develop and optimize real-time embedded H.264/AVC main profile video encoder on the TMS320C6678. The optimization techniques for the encoding process are divided into two parts: code level optimization and system level optimization. The aim of code level optimization is to determine computation intensive functions and to optimize these key functions by re-writing them in the assembly code utilizing TMS320C6678 SIMD and pipeline instructions and software pipelining technique. The emphasis in system level optimization is put on the optimization methods of memory space allocation and utilizing L2 SRAM/Cache to enhance the data/code access speed. In this work, one core of the C6678 eight cores was utilized. We have achieved about 7.5 times speed up in code level optimization, and about 1.5 times speed up in system level optimization by improving the memory access efficiency. By integrating all these optimization efforts, about 10 times speed up is obtained comparing to the standard reference software. Experiments show that the coding performance of the optimized encoder is improved effectively and video sequences with CIF resolution can be encoded in real time

کلیدواژه ها:

H.264/AVC encoder ، TMS320C6678 ، TI KeyStoneI architecture ، C66x DSP ، optimization ، software pipelining