An Ultra-Low-Power ΔΣ Modulator using ZCD-Sharing and Changing Stages Output Capacitance Timing Techniques

In this report, an ultra-low-power 2nd order delta sigma modulator with 42.67 dB SNDR and 3.32 μw power consumption is proposed using the zero crossing detector sharing (ZCD-sharing) and changing stages output capacitance timing techniques. In this way, the pulse-width dedicated is proportional to output capacitance. The created harmonic distortion is minimized and the power efficiency is maximized. Also, the chip area is minimized in this technique in compared to the opamp-sharing.

کلیدواژه ها:

Delta sigma modulator ، Noise shaping ، Second order filter