Secure Hardware Architecture for Post-Quantum Cryptography Implementation in IoT Devices with Limited Resources

The emergence of quantum computing poses a significant threat to current cryptographic systems, particularly in resource-constrained Internet of Things (IoT) devices. This paper presents a novel secure hardware architecture specifically designed for implementing post-quantum cryptography (PQC) on IoT devices with limited resources. The proposed architecture, named LightPQ, incorporates a modular design with dedicated accelerators for lattice-based cryptography operations, secure key storage mechanisms, and hardware-based countermeasures against side-channel attacks. The architecture achieves a balance between security, performance, and energy efficiency by leveraging optimized arithmetic units, memory management techniques, and reconfigurable components. We implement LightPQ on an FPGA platform and evaluate its performance using four NIST PQC finalists: Kyber, SABER, Dilithium, and FALCON. Experimental results demonstrate that LightPQ reduces energy consumption by up to ۷۲% compared to software implementations while providing ۵.۲× speedup for key operations. The architecture requires only ۳۲KB of memory and consumes ۲۸mW of power at ۱۶MHz, making it suitable for resource-constrained IoT devices. Security analysis confirms resistance against timing attacks, power analysis, and fault injection with minimal overhead. This work contributes a practical solution for securing IoT ecosystems against quantum threats while addressing the stringent resource constraints of embedded devices.

کلیدواژه ها:

post-quantum cryptography ، IoT security ، hardware acceleration ، lattice-based cryptography ، side-channel protection ، resource-constrained devices