A Low Power, High Speed and Wide Detectable Frequency Range Phase Detector with a Novel Open Loop Structure

The purpose of this paper is to design a high-speed phase detector with high sensitivity to phase error detection. In order to overcome the limitations of conventional circuits, anopen loop structure is used in proposed structure. The SPICE simulation results related to paper design’s shows that in afrequency range between 1 KHz to 3 GHz, the maximum power consumption is around 1.59mW. The circuit was simulated in 0.18μm CMOS technology

کلیدواژه ها:

phase locked loop ، phase detector ، charge pump