A Seven-Valued Full Adder/Subtractor Architecture

Current generation of computers is based on binary logic. There are two types of operations executed in this generationi.e., mathematical and logical operations. Logical instructions use binary logic operations while the mathematicaloperations yet again use the mathematical operations based on binary logic. This article introduces a new idea based onMulti-Valued Logic (MVL) to build a full adder. Here mathematical and logical operations are considered separately.The reported work only considers mathematical operation and more specifically the full adder. The proposed full-addercircuit is based on Operational Amplifier (Op-Amp) and uses MVL with seven electrical levels for its design. This workis implemented in voltage mode and it is a step towards a new generation of computers. Schematic, layout, design andtest results for the proposed full-adder are reported in the article.

کلیدواژه ها:

Multi-valued logic ، Multi-valued full adder ، Op-Amp based full adder