An Energy Recovery Static RAM With MEQUL Transistor And Driving Line Technique in voltage mode

In this paper, we introduce a new low-power SRAM cell with seven transistors. The design is based on energy recovery and driving source line cell that reduces the power dissipation associated with write operations. The new memory is designed using 0.6μm CMOS technology and operates in voltage mode with 5 Volts power supply. Simulation results indicate that the energy saving is improved about 20% in read cycle and 40% in write cycle at 166MHz, compared to conventional design. The layout penalty of seven-transistor cell is negligible compared to 6-transistor SRAM.

کلیدواژه ها:

Memory ، Low power ، High speed and SRAM