A ۱۶-level digital trimmable cMOS ۶۵nm bandgap reference with process, voltage, and temperature stability

A ۶۵nm CMOS trimmable bandgap reference (BGR) circuit is developed to deliver stable reference voltages of ۰.۶۵V, with a supply voltage range of ۱.۵V to ۳.۶V. A key contribution is the incorporation of a ۱۶-level ۴-bit digital trimming circuit, allowing fine adjustment of the reference voltage. The trimming circuit employs a decoder and multiplexer structure to select different points along a resistor ladder, enabling post-manufacturing voltage tuning to compensate for process variations. This methodology ensures precise control of the output voltage, improving accuracy and reliability under varying conditions. The design aims to achieve a phase margin greater than ۴۵°, a temperature coefficient below ۲.۵mV, and low current consumption under ۶µA across Process, Voltage & Temperature (PVT) variations. The workflow includes calculating MOSFET and passive component parameters, designing the schematic of a single-stage operational amplifier and the trimmable BGR circuit, followed by pre-layout simulations. The pre-layout results show a DC gain of ۶۰.۸۸dB and a phase margin of ۶۳° for the op-amp. The temperature coefficient for the ۰.۶۵V reference voltage trimmable BGR is ۱.۶۷mV across Process, Voltage & Temperature (PVT), with current consumption remaining below ۶µA. Considering the degraded circuit performance caused by the process & manufacturing deviation, the addition of the trimming circuit significantly enhances the design's adaptability, ensuring it meets the performance targets even in the presence of manufacturing variations which allow us trim the affected output voltage back to desired voltage where in this work we set it at ۰.۶۵V.

کلیدواژه ها:

CMOS ، Bandgap ، Temperature Coefficient ، Trimming ، Current consumption