Voltage-Controlled Differential Ring Oscillator Based on FGMOS

In this article, a modified differential delay cell (DDC) based on a floating gate MOS (FGMOS) transistor is presented, which can be implemented with only ۶ transistors and its delay characteristics can be easily changed without any additional mechanism. A ۳-stage voltage-controlled differential ring oscillator (VC-DRO) was implemented basedon the proposed DDC. The proposed oscillator was simulated with ۱۸۰nm CMOS technology with ۱V supply voltage. A control voltage was applied to the second input of the FGMOS transistor, and based on the simulation results, it was determined that the oscillation frequency changed in the range from ۱.۰۹۴ GHz to ۱.۵۶۶ GHz. The power consumption in the proposed oscillator changes in the range of frequency adjustment from ۳۳۳.۸۵ μW to ۷۲۶.۰۳ μW. Based on the results, the power delay product (PDP) value for the proposed ۳-stage oscillator is in the range of ۴۹.۸۸ fJ to ۷۷.۲۳ fJ. By changing the supply voltage in the range of ۰.۴ V to ۱ V and the control voltage equal to ۰.۴ V, the oscillation frequency varies from ۶.۰۱۳ MHz to ۱.۵۷۷ GHz and the power consumption varies from ۰.۳۳۹ μW to ۷۲۸.۵۶ μW. Also, the PDP value varies from ۹.۴۱ fJ to ۷۶.۹۸ fJ.