DMR-based Technique for Fault Tolerant AES S-box Architecture

سال انتشار: 1399
نوع سند: مقاله کنفرانسی
زبان: انگلیسی
مشاهده: 245

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شناسه ملی سند علمی:

AREEI01_009

تاریخ نمایه سازی: 20 شهریور 1400

چکیده مقاله:

This paper presents a high-throughput fault-resilient hardware implementation of AES S-box, called HFS-box. We propose deep pipelining S-box in the gate level in which a novel DMR technique is used for fault correction. Proposed fault-resilient technique is based on fault correction in DMR implementation (FC-DMR) of each S-box’s combined with a temporal redundancy technique. If a transient natural or even malicious fault(s) in each pipeline stage is detected, the corresponding error signal become high and as a result the control unit holds the output of our proposed DMR voter till the fault effect disappears. Proposed low-cost HFS-box provide a high capability of fault tolerant against transient faults with any duration by putting low area overhead, i.e. ۱۳۷%, and low throughput degradation, i.e. ۱۱.۳%, on the original implementation.

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نویسندگان

Mahdi Taheri

Department of Electrical Engineering, Shahid Bahonar University, Kerman, Iran

Saeideh Sheikhpour

Department of Electrical Engineering, Shahid Bahonar University, Kerman, Iran

Mohammad Saeed Ansari

Eideticom Computational Storage, Calgary, AB, Canada

Ali Mahani

Department of Electrical Engineering, Shahid Bahonar University, Kerman, Iran