An Ultra High Gain Low Power Folded cascode CMOS LNA at 1.5 GHz With the Gate Resistance Used for Input Matching

Design and simulated results of a fully integrated 1.5-GHz CMOS low-noise amplifier (LNA) is presented. To design this LNA, the parasitic input resistance of a metal-oxide-semiconductor field-effect transistor (MOSFET) is converted to 50Ω by a simple L–C network, hence eliminating the need for source degeneration. The Major Problem in the LNAs with folded cascode architecture is low reverse isolation. In this paper this parameter is improved by adding a transistor.The power gain and the minimal Noise Figure (NF) are two important factors for the circuits. Besides those factors, good linearity, input impedance matching, low supply voltage and the lower power consumption are also desired. The LNA achieves a small signal gain of 22.5 dB. The LNA acquires an NF of 2.6 dB with an input return loss of -17.2 dB and an output return loss of -16 dB. The LNA consumes 5.7 mW from a 0.8V supply, the presented LNA achieves the best overall performance when compared with the most recently published LNAs.

کلیدواژه ها:

folded cascode architecture ، parasitic input resistance ، low noise amplifier ، noise figure ، reverse isolation