Ali Ghareaghaji - Electrical and Computer Department Shahid Beheshti University Tehran,Iran

In this paper, a method to reduce the second order effects on the circuit performances caused by the small sized MOS transistors is proposed and a multiplier/divider circuit isdesigned using this method. The main advantages of the proposed circuit are reduced errors of the output currentfunction, a smaller area on the chip, possibility of controlling the output current with the control voltage, operation at higher frequencies and more efficient power consumption.

reducing MOSFET’s second order effects; square-root circuit; squarer/divider circuit; multiplier circuit Introduction