Design of a digital delta sigma modulator to reduce hardware and power consumption in fractional frequency synthesizers

سال انتشار: 1402
محل انتشار: دوازدهمین کنفرانس ملی مهندسی برق مجلسی
کد COI اختصاصی: NCEEM12_008
زبان مقاله: انگلیسی
تعداد مشاهده: 88

نویسندگان

Department of electrical engineering, Shoushtar branch, Islamic Azad University, Shoushtar, Iran

Department of electrical engineering, Shoushtar branch, Islamic Azad University, Shoushtar, Iran.

چکیده

The period of quantization noise depends on the structure of the modulator, the initial conditions, the input and the modulus of the quantizer. The structures examined are the Multistage Noise Forming Structures (MASH), the Single Quantizer (SQ), and the Feedback Error Modulator (EF). There are two ways to maximize the periodicity, which are: random methods and deterministic methods. The random method uses vibration to increase the signal cycle. The definitive method causes changes in the internal structure of the modulator. Most randomized methods reduce undesirable solids and increase the period of quantization noise. The disadvantage of random methods is that they generate noise in the output spectrum. In this proposal, a new method for MIG digital Sigma Delta modulators is proposed to try to increase the output period and reduce the undesirable ones. The proposed method also uses modulators with different word lengths. The input word is divided into several parts and each part is transferred to a modulator with a shorter word length. Therefore, hardware consumption is reduced and the power consumption of transistors is reduced. Also in this structure, vibration signal is used to change the alternating state of the output and reduce the undesirable tones

کلیدواژه ها

phase noise reduction, self-injection locking, cross-coupled oscillator, Adler equation, substrate noise coupling

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