Elham Safi - Electrical and Computer Engineering University of Tehran
Reihaneh Saberi
Zainalabedin Navabi

As the use of general and special processors as embedded cores in SoC designs increases, developing high quality test programs becomes important. Our software-based self-testing approach is based on using macros including a sequence of instructions to exercise all operations performed by each component of the processor. Generation of the macros require instruction set and data transfer path information. The required information is available in the processor’s RTL (Register Transfer Level) description and ISA (Instruction Set Architecture). We employ Genetic Algorithms to choose a suitable sequence of macros for the test program and assign good data values to the composing instructions of macros. The method was applied to a benchmark processor to demonstrate steps involved in our approach for extraction of a test program utilizing RTL description,ISA, and GAs.