An Ultra-low-power Static Random-Access Memory Cell Using Tunneling Field Effect Transistor

سال انتشار: 1399
نوع سند: مقاله ژورنالی
زبان: انگلیسی
مشاهده: 226

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شناسه ملی سند علمی:

JR_IJE-33-11_013

تاریخ نمایه سازی: 6 اردیبهشت 1400

چکیده مقاله:

In this research article, an Ultra-low-power ۱-bit SRAM cell is introduced using Tunneling Field Effect Transistor (TFET). This paper investigates feasible ۶T SRAM configurations on improved N-type and P-type TFETs integrated on both InAs (Homojunction) and GaSb-InAs (Heterojunction) platforms. The voltage transfer characteristics and basic parameters of both Homo and Heterojunctions are examined and compared. The proposed TFET based SRAM enhances the stability in the hold, read, and write operations. This work evaluates the potential of TFET which can replace MOSFET due to the improved performance with low-power consumption, high speed, low sub-threshold slope, and supply voltage (VDD = ۰.۲ V). The results are correlated with CMOS ۳۲nm technology. The proposed SRAM TFET cell is implemented using ۳۰nm technology and simulated using an H-SPICE simulator with the help of Verilog-A models. The proposed SRAM TFET cell architecture achieves low power dissipation and attains high performance as compared to the CMOS and FINFET.

کلیدواژه ها:

Static Random-Access Memory ، Homojunction ، Heterojunction ، Tunneling Field Effect Transistor ، Complementary Metal Oxide Semiconductor

نویسندگان

N. Arunkumar

Department of ECE, P.A College of Engineering and Technology, Pollachi, India

N. Senathipathi

Department of ECE, P.A College of Engineering and Technology, Pollachi, India

S. Dhanasekar

Department of ECE, Sri Eshwar College of Engineering, Coimbatore, India

P. Malin Bruntha

Department of ECE, Karunya Institute of Technology and Sciences, Coimbatore, India

C. Priya

Department of ECE, Karpagam College of Engineering Coimbatore, India

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